mirror of
https://gitlab.cern.ch/wotsubo/endcap-sl-software-ri-generator.git
synced 2025-04-11 16:07:55 +09:00
Allow definition of overlapped register with non-overlapped fields
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parent
8732afd297
commit
205b08400b
2 changed files with 190 additions and 21 deletions
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@ -117,15 +117,19 @@ pub fn generate_flatmap(xml: &path::Path, out: Option<&path::Path>) -> Result<()
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for (addr, reg) in maps.iter().enumerate() {
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match reg {
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Some(reg) => {
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let path = reg.0.join("/");
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let multiple_id = reg.2.map_or("".to_string(), |x| x.to_string());
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let path = reg.path.join("/");
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let multiple_id = reg.multiple_id.map_or("".to_string(), |x| x.to_string());
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wtr.write_record([
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format!("0x{:04x}", addr),
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path,
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reg.1.name.clone(),
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reg.register.name.clone(),
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multiple_id,
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reg.1.modf.to_string(),
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reg.1.desc.as_ref().unwrap_or(&"".to_string()).to_string(),
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reg.register.modf.to_string(),
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reg.register
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.desc
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.as_ref()
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.unwrap_or(&"".to_string())
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.to_string(),
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])?;
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}
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None => wtr.write_record([
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197
src/validator.rs
197
src/validator.rs
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@ -4,7 +4,19 @@ use thiserror::Error;
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use crate::types::{Block, Module, ModuleBlockElements, Register};
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type FlattenedRegisterMap<'a> = Vec<Option<(Vec<&'a str>, &'a Register, Option<u32>)>>;
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#[derive(Debug, Clone)]
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pub struct FlattenedRegisterEntry<'a> {
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/// contains all parents
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pub path: Vec<&'a str>,
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pub register: &'a Register,
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/// Id of multiple, if the register is multiple
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pub multiple_id: Option<u32>,
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/// Used bits
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pub field_masks: u32,
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}
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/// Flattened register map.
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type FlattenedRegisterMap<'a> = Vec<Option<FlattenedRegisterEntry<'a>>>;
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impl Module {
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/// Validate the address assignment, generating a flatten register map.
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@ -19,13 +31,19 @@ impl Module {
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#[derive(Debug, Error)]
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pub enum ValidationError {
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#[error("address duplicated at 0x{address:08x}: \"{existing_name}\", \"{new_name}\"")]
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AddressDuplicated {
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RegisterAddressDuplicated {
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address: u32,
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existing_name: String,
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new_name: String,
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},
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#[error("address 0x{address:08x} is out of range: \"{name}\"")]
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AddressOutofRange { address: u32, name: String },
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#[error("field masks are duplicated at 0x{address:08x}: \"{reg_name}\", bits: 0x{duplicated_mask:08x}")]
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FieldMaskDuplicated {
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address: u32,
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reg_name: String,
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duplicated_mask: u32,
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},
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#[error("unsupported structure: {msg}")]
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UnsupportedStructure { msg: &'static str },
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}
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@ -101,6 +119,30 @@ impl Validate for Register {
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) -> (FlattenedRegisterMap<'a>, Vec<ValidationError>) {
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let addr = base.0 + self.addr;
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let path = base.1;
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let new_name = {
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let mut path = path.clone();
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path.push(&self.name);
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path.join("/")
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};
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let (reg_mask, duplicate_bits) = match self.elements.is_empty() {
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true => (0xffff_ffff, 0),
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false => self
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.elements
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.iter()
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.fold((0, 0), |(sum, _duplicate_bits), field| {
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(sum + field.mask, sum & field.mask)
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}),
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};
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if duplicate_bits != 0 {
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errors.push(ValidationError::FieldMaskDuplicated {
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address: addr,
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reg_name: new_name,
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duplicated_mask: duplicate_bits,
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});
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return (mapping, errors);
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}
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let (len, offset) = match &self.multiple {
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Some(multiple) => (multiple.multiple, multiple.offset),
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None => (1, 1),
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@ -119,23 +161,47 @@ impl Validate for Register {
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};
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if let Some(old) = regmap {
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let existing_name = {
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let mut path = old.0.clone();
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path.push(&old.1.name);
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let mut path = old.path.clone();
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path.push(&old.register.name);
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path.join("/")
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};
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let new_name = {
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let mut path = path.clone();
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path.push(&self.name);
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path.join("/")
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};
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errors.push(ValidationError::AddressDuplicated {
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address: addr,
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existing_name,
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new_name,
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});
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if old.register.name != self.name {
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errors.push(ValidationError::RegisterAddressDuplicated {
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address: addr,
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existing_name,
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new_name: new_name.clone(),
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});
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continue;
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}
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log::trace!(
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"defining same register at 0x{addr:08x}: {:?}, {:?}",
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old.register,
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self
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);
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let duplicate_bits = old.field_masks & reg_mask;
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if duplicate_bits != 0 {
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errors.push(ValidationError::FieldMaskDuplicated {
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address: addr,
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reg_name: new_name.clone(),
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duplicated_mask: duplicate_bits,
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});
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}
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let multiple_id = if len == 1 { None } else { Some(id) };
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*regmap = Some(FlattenedRegisterEntry {
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path: path.clone(),
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register: self,
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multiple_id,
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field_masks: old.field_masks | reg_mask,
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})
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} else {
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let multiple_id = if len == 1 { None } else { Some(id) };
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*regmap = Some((path.clone(), self, multiple_id))
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*regmap = Some(FlattenedRegisterEntry {
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path: path.clone(),
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register: self,
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multiple_id,
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field_masks: reg_mask,
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})
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}
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}
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@ -148,7 +214,7 @@ mod test {
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use itertools::Itertools;
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use crate::types::{
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Module, ModuleBlockElements, MultipleParams, Register, RwSpecifier, XmlGitInfo,
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Field, Module, ModuleBlockElements, MultipleParams, Register, RwSpecifier, XmlGitInfo,
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};
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#[test]
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@ -255,6 +321,105 @@ mod test {
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let (maps, errors) = module.validate();
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assert_eq!(maps.len(), 0x1000);
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assert!(!errors.is_empty());
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assert_eq!(errors.len(), 1);
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}
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// Fields are orthogonal
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#[test]
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fn duplicate_reg_but_fields_are_ok() {
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let reg1 = Register {
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name: "test1".to_string(),
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addr: 0,
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r#type: crate::types::DataType::D32,
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mask: None,
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modf: RwSpecifier::R,
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multiple: None,
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default: None,
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desc: None,
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elements: vec![
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Field {
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name: "field_1".to_string(),
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mask: 0x0000_00ff,
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interface: None,
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multiple: None,
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default: None,
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sclr: None,
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desc: Some("field 1 description".to_string()),
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elements: vec![],
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},
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Field {
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name: "field_2".to_string(),
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mask: 0x0000_ff00,
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interface: None,
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multiple: None,
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default: None,
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sclr: None,
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desc: Some("field 2 description".to_string()),
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elements: vec![],
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},
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],
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};
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let reg2 = Register {
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name: "test1".to_string(),
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addr: 0,
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r#type: crate::types::DataType::D32,
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mask: None,
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modf: RwSpecifier::R,
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multiple: None,
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default: None,
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desc: None,
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elements: vec![
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Field {
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name: "field_3".to_string(),
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mask: 0x00ff_0000,
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interface: None,
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multiple: None,
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default: None,
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sclr: None,
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desc: Some("field 3 description".to_string()),
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elements: vec![],
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},
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Field {
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name: "field_4".to_string(),
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mask: 0xff00_0000,
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interface: None,
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multiple: None,
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default: None,
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sclr: None,
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desc: Some("field 4 description".to_string()),
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elements: vec![],
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},
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],
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};
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let module = Module {
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name: "module".to_string(),
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addr: 0,
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size: 0x10,
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amod: None,
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r#type: None,
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desc: None,
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elements_bitstring: vec![],
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elements_other: vec![
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ModuleBlockElements::Register(reg1),
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ModuleBlockElements::Register(reg2),
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],
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xmlhash: [0; 32],
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git_info: XmlGitInfo {
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describe: "".to_string(),
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commit_timestamp: "".to_string(),
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sha: "".to_string(),
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},
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};
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let (maps, errors) = module.validate();
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eprintln!("{:#?}", maps);
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eprintln!(
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"{:#?}",
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maps.iter().filter(|e| e.is_some()).collect_vec().len()
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);
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assert_eq!(maps.len(), 0x10);
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assert!(errors.is_empty());
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assert_eq!(maps.iter().filter(|e| e.is_some()).collect_vec().len(), 0x1);
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}
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}
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