qwjyh/endcap-sl-software-ri-generator
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Wataru Otsubo 2025-02-20 13:01:02 +00:00
parent e62d935829
commit dd119ccdb8
2 changed files with 19 additions and 16 deletions
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23
src/generator.rs
View file

@ -287,7 +287,7 @@ impl CodeGen for Block {
ModuleBlockElements::Block(_) => { ModuleBlockElements::Block(_) => {
let child_upper_camel_name = util::parse_to_ident(&child_name.to_upper_camel_case())?; let child_upper_camel_name = util::parse_to_ident(&child_name.to_upper_camel_case())?;
Ok(quote! { Ok(quote! {
pub fn #snake_case_name(&self) -> #snake_case_name::#child_upper_camel_name { pub fn #snake_case_name(&self) -> #snake_case_name::#child_upper_camel_name<T> {
#snake_case_name::#child_upper_camel_name::new(self.mem_ptr) #snake_case_name::#child_upper_camel_name::new(self.mem_ptr)
} }
}) })
@ -297,7 +297,7 @@ impl CodeGen for Block {
match &register.multiple { match &register.multiple {
None => { None => {
Ok(quote! { Ok(quote! {
pub fn #snake_case_name(&self) -> #snake_case_name::#child_upper_camel_name { pub fn #snake_case_name(&self) -> #snake_case_name::#child_upper_camel_name<T> {
#snake_case_name::#child_upper_camel_name::new(self.mem_ptr) #snake_case_name::#child_upper_camel_name::new(self.mem_ptr)
} }
}) })
@ -311,7 +311,7 @@ impl CodeGen for Block {
} }
}); });
Ok(quote! { Ok(quote! {
pub fn #snake_case_name(&self) -> [#snake_case_name::#child_upper_camel_name; #num_multiple] { pub fn #snake_case_name(&self) -> [#snake_case_name::#child_upper_camel_name<T>; #num_multiple] {
[ #(#elements),* ] [ #(#elements),* ]
} }
}) })
@ -324,9 +324,9 @@ impl CodeGen for Block {
}).collect::<Result<Vec<proc_macro2::TokenStream>, CodeGenError>>()?; }).collect::<Result<Vec<proc_macro2::TokenStream>, CodeGenError>>()?;
let parent_struct = if parent_name == util::parse_to_ident("RegisterInterface").unwrap() { let parent_struct = if parent_name == util::parse_to_ident("RegisterInterface").unwrap() {
quote! {#parent_name} quote! {#parent_name<T>}
} else { } else {
quote! {#parent_name<'a>} quote! {#parent_name<'a, T>}
}; };
let child_mods = self let child_mods = self
@ -346,18 +346,20 @@ impl CodeGen for Block {
use std::marker::PhantomData; use std::marker::PhantomData;
use crate::axic2c1::spec::AxiC2c1Spec;
use super::#parent_name; use super::#parent_name;
#(#child_mods)* #(#child_mods)*
const OFFSET: usize = #addr; const OFFSET: usize = #addr;
pub struct #upper_camel_name<'a> { pub struct #upper_camel_name<'a, T: AxiC2c1Spec> {
mem_ptr: *mut u32, mem_ptr: *mut u32,
_marker: PhantomData<&'a mut #parent_struct>, _marker: PhantomData<&'a mut #parent_struct>,
} }
impl #upper_camel_name<'_> { impl<T: AxiC2c1Spec> #upper_camel_name<'_, T> {
pub(crate) fn new(parent_ptr: *mut u32) -> Self { pub(crate) fn new(parent_ptr: *mut u32) -> Self {
#upper_camel_name { #upper_camel_name {
mem_ptr: unsafe { parent_ptr.add(OFFSET) }, mem_ptr: unsafe { parent_ptr.add(OFFSET) },
@ -441,16 +443,17 @@ impl CodeGen for Register {
use std::marker::PhantomData; use std::marker::PhantomData;
use crate::axic2c1::spec::AxiC2c1Spec;
use crate::register_spec::{DataConversionError, Modifiable, Readable, RegisterSpec, Writable}; use crate::register_spec::{DataConversionError, Modifiable, Readable, RegisterSpec, Writable};
const OFFSET: usize = #addr; const OFFSET: usize = #addr;
pub struct #reg_name<'a> { pub struct #reg_name<'a, T: AxiC2c1Spec> {
mem_ptr: *mut u32, mem_ptr: *mut u32,
_marker: PhantomData<&'a mut super::#parent_name<'a>>, _marker: PhantomData<&'a mut super::#parent_name<'a, T>>,
} }
impl #reg_name<'_> { impl<T: AxiC2c1Spec> #reg_name<'_, T> {
pub(crate) fn new(parent_ptr: *mut u32) -> Self { pub(crate) fn new(parent_ptr: *mut u32) -> Self {
#reg_name { #reg_name {
mem_ptr: unsafe { parent_ptr.add(OFFSET) }, mem_ptr: unsafe { parent_ptr.add(OFFSET) },

12
src/generator/codegen_registerspec_impl.rs
View file

@ -11,19 +11,19 @@ pub(super) fn gen_registerspec_impl(
) -> TokenStream { ) -> TokenStream {
let impl_rw = match modf { let impl_rw = match modf {
RwSpecifier::R => quote! { RwSpecifier::R => quote! {
impl Readable for #reg_name<'_> {} impl<T: AxiC2c1Spec> Readable for #reg_name<'_, T> {}
}, },
RwSpecifier::W => quote! { RwSpecifier::W => quote! {
impl Writable for #reg_name<'_> {} impl<T: AxiC2c1Spec> Writable for #reg_name<'_, T> {}
}, },
RwSpecifier::RW => quote! { RwSpecifier::RW => quote! {
impl Readable for #reg_name<'_> {} impl<T: AxiC2c1Spec> Readable for #reg_name<'_, T> {}
impl Writable for #reg_name<'_> {} impl<T: AxiC2c1Spec> Writable for #reg_name<'_, T> {}
impl Modifiable for #reg_name<'_> {} impl<T: AxiC2c1Spec> Modifiable for #reg_name<'_, T> {}
}, },
}; };
quote! { quote! {
impl RegisterSpec for #reg_name<'_> { impl<T: AxiC2c1Spec> RegisterSpec for #reg_name<'_, T> {
type Ux = #type_ux; type Ux = #type_ux;
type T = #type_t; type T = #type_t;