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refactor(SlaveLogParser): reordered statements & change some types

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- (e.g. SVector)
- add docstring for PowerResult
This commit is contained in:
Wataru Otsubo 2024-11-01 16:29:14 +09:00
parent f1db431f7e
commit 78beef2c68
1 changed files with 33 additions and 12 deletions
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45
src/SlaveLogParser.jl
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@ -12,7 +12,7 @@ const HEADER_POWER_START = "=============== Test Power Start ==============="
const HEADER_ASDTP_START = "=============== Test ASDTP Start ==============="
const HEADER_RECOV_START = "=============== Test Recov Start ==============="
HEADER_STARTS =
[HEADER_QSPIP_START, HEADER_POWER_START, HEADER_ASDTP_START, HEADER_RECOV_START]
SVector(HEADER_QSPIP_START, HEADER_POWER_START, HEADER_ASDTP_START, HEADER_RECOV_START)
"""
Indicate parser state.
@ -27,16 +27,6 @@ In `MODE_NONE`, each line is feeded into parser to detect the start of each sect
MODE_RECOV
end
struct PowerResult
result_3v3d::Float64
result_3v3a::Float64
result_n3va::Float64
fpga_temp::Float64
channelvals::SVector{16, @NamedTuple{dac::Int64, adc::Int64}}
result::Bool
end
struct SlaveLogResult end
"""
@ -108,6 +98,31 @@ function parse_qspip_section!(lines::Base.Iterators.Stateful)
nothing
end
# ==================================
# Power
"""
Results from power test
# Fields
- result_3v3d::Float64
- result_3v3a::Float64
- result_n3va::Float64
- fpga_temp::Float64
- channelvals::SVector{16, @NamedTuple{dac::Int64, adc::Int64}}
- result::Bool
"""
struct PowerResult
result_3v3d::Float64
result_3v3a::Float64
result_n3va::Float64
fpga_temp::Float64
channelvals::SVector{16, @NamedTuple{dac::Int64, adc::Int64}}
result::Bool
end
"""
parse_power_section!(lines::Base.Iterators.Stateful)::PowerResult
@ -148,7 +163,7 @@ function parse_power_section!(lines::Base.Iterators.Stateful)::PowerResult
(dac = parse(Int64, m[1]), adc = parse(Int64, m[2]))
end |>
Tuple |>
SVector
SVector{16, @NamedTuple{dac::Int64, adc::Int64}}
line = popfirst!(lines)
result = let
m = match(r"^Test Power Reseult = (\d)$", line)
@ -162,6 +177,9 @@ function parse_power_section!(lines::Base.Iterators.Stateful)::PowerResult
PowerResult(result_3v3d, result_3v3a, result_n3va, fpga_temp, channelvals, result)
end
# ==================================
# Asdtp
"""
Measurement result for asic in asdtp test.
"""
@ -356,6 +374,9 @@ function parse_recov_section!(lines::Base.Iterators.Stateful)::Union{Bool, Missi
end
end
# ==================================
# Main
"""
parse_slavelog_file(filename::AbstractString)