new(SlaveLogParser): power section parser

src/SlaveLogParser.jl

@@ -1,6 +1,7 @@
 module SlaveLogParser
 
 using StaticArrays
+using Printf
 using AutoHashEquals
 
 const HEADER_QSPIP_START = "=============== Test QAPIp Start ==============="
@@ -28,6 +29,7 @@ struct PowerResult
     result_3v3a::Float64
     result_n3va::Float64
     fpga_temp::Float64
+    channelvals::SVector{16, @NamedTuple{dac::Int64, adc::Int64}}
 
     result::Bool
 end
@@ -112,8 +114,52 @@ Parse Power section of given stateful iterator of log.
 - `lines`: Stateful iterator of slave log file lines
 """
 function parse_power_section!(lines::Base.Iterators.Stateful)
-    # TODO
-    nothing
+    line = popfirst!(lines)
+    result_3v3d = let
+        m = match(r"^3V3D \[V\] = ([\d|\.]+)$", line)
+        parse(Float64, m[1])
+    end
+    line = popfirst!(lines)
+    result_3v3a = let
+        m = match(r"^3V3A \[V\] = ([\d|\.]+)$", line)
+        parse(Float64, m[1])
+    end
+    line = popfirst!(lines)
+    result_n3va = let
+        m = match(r"^-3VA \[V\] = ([-|\d|\.]+)$", line)
+        parse(Float64, m[1])
+    end
+    line = popfirst!(lines)
+    fpga_temp = let
+        m = match(r"^FPGA Temprature \[C\] = ([\d|\.]+)$", line)
+        parse(Float64, m[1])
+    end
+    line = popfirst!(lines)
+    line = popfirst!(lines)
+    channelvals =
+        Iterators.map(1:16) do ch
+            ch_s = @sprintf "%x" (ch - 1)
+            re = Regex(
+                "channel $(ch_s): DAC \\[mV\\] = (\\d+), ADC \\[mV\\] = (\\d+)\$",
+            )
+            line = popfirst!(lines) # I'm not sure this mutating operation is called in sequence
+            m = match(re, line)
+            @info "" m line
+            (dac = parse(Int64, m[1]), adc = parse(Int64, m[2]))
+        end |>
+        Tuple |>
+        SVector
+    line = popfirst!(lines)
+    result = let
+        m = match(r"^Test Power Reseult = (\d)$", line)
+        if m[1] == "1"
+            true
+        else
+            false
+        end
+    end
+
+    PowerResult(result_3v3d, result_3v3a, result_n3va, fpga_temp, channelvals, result)
 end
 
 """