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d41bc7c1b0
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add: dependencies
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2025-02-07 17:47:49 +09:00 |
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76c19d194d
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new: file IO & formatting & update docs with an example
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2025-02-06 20:58:59 +09:00 |
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a6c56ef9d6
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refactor: make only top level codegen is public and CodeGen private
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2025-02-06 18:54:11 +09:00 |
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testuser
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472723016c
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update(generator): return error when block has multiple
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2025-02-03 19:55:05 +09:00 |
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testuser
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ae01a30cb0
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fix(generator): add explicit cast to change types of array size & ptr offset
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2025-02-03 19:41:45 +09:00 |
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testuser
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d85642dcec
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new(generator): multiple register
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2025-02-03 19:09:35 +09:00 |
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testuser
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7aba746503
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fix(main): error dir name was changed
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2025-02-03 17:53:35 +09:00 |
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testuser
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b5a189f9a1
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new(codegen_register): add docs
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2025-02-03 17:51:54 +09:00 |
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testuser
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3e72513b75
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fix(generator): syntax for top level doccment
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2025-02-03 17:51:15 +09:00 |
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testuser
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76310c64a3
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clippy lint
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2025-02-03 04:44:31 +09:00 |
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testuser
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6ff047563c
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new(main): add filesystem io
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2025-02-03 04:39:01 +09:00 |
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testuser
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fd106e3355
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new(generator): separate modules for each blocks (not yet implemented file io)
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2025-02-03 03:07:40 +09:00 |
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cb67f9648b
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fix: add explicit casting in single Ux field generation (Now, it atually passed compiling!)
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2025-02-02 16:58:32 +09:00 |
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d2f9cd603f
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fix: missing interpolation (impl CodeGen for Register, Debug)
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2025-02-02 16:57:37 +09:00 |
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cba4b3af05
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fix: missing interpolation (impl CodeGen for Block, RegisterInterface)
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2025-02-02 16:57:07 +09:00 |
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9e7a83242b
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fix: add parent_name to CodeGen to properly refer to parent name, and add Reg to register children
One more: if parent is RegisterInterface, lifetime param is omitted
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2025-02-02 16:55:37 +09:00 |
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5f7db47fcf
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fix: missing interpolation (generate_single_ux_field, mask -> #mask_name)
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2025-02-02 16:51:12 +09:00 |
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fe6ce5a0dd
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fix: missing interpolation (generate_multiple_bool_field, BANK121_GTY_CHANNEL_MASK)
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2025-02-02 16:50:33 +09:00 |
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71c25dd379
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fix: missing interpolation (reg_type_def_with_field, GtyDelayBank123)
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2025-02-02 16:49:54 +09:00 |
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cc0fe59b28
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fix: missing interpolation (reg_type_def_masked, SlId)
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2025-02-02 16:48:53 +09:00 |
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9a882fdab1
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new: printto file in main
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2025-02-02 16:48:15 +09:00 |
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28b2b198a8
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update: docs in generator & codegen_register
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2025-02-02 04:25:29 +09:00 |
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4131ce1880
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refactor(generator): remove impl DataType (use DataType -> RustUxTypes -> Ident)
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2025-02-02 04:10:25 +09:00 |
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7c1a0856a0
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refactor: add _ prefix to unused vals (impl for Memory & Fifo)
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2025-02-02 04:09:39 +09:00 |
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9728af3551
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new(codegen_register): add multiple custom value fields generator
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2025-02-02 04:08:36 +09:00 |
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30279dc2b3
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refactor(generator): rename to generate_custom_values_const_enumdef
they are not masks, but consts
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2025-02-02 04:07:32 +09:00 |
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39a793462a
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fix: fix mask type for multiple field register
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2025-02-02 03:16:40 +09:00 |
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dbb124ec76
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refactor: rename single custom generator & update doc & remove unused fn def
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2025-02-02 03:05:00 +09:00 |
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c3effa280a
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update(doc): note on adding "desc" as doccomments
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2025-02-02 02:52:11 +09:00 |
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fdb87a0898
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fix: ident was interpolated as string
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2025-02-02 02:51:30 +09:00 |
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f96aab4d9d
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fix: add values pattern to "single" registers, introducing FieldType
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2025-02-02 02:50:40 +09:00 |
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49a9698a32
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refactor: remove to_shouty_snake_case & inline mask variable in reg_type_def_masked
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2025-02-02 02:48:56 +09:00 |
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80ce358aee
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fix(generator): mask (u32) should be Literal, not Identifier
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2025-02-01 20:41:28 +09:00 |
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859d9c0fa3
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update: Add validation for get_name which rejects empty string (which is not a valid token)
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2025-02-01 20:39:23 +09:00 |
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1ed3843508
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finish: impl CodeGen for Register
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2025-02-01 20:13:48 +09:00 |
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48215049e8
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update: doc on codegen_register
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2025-02-01 20:03:59 +09:00 |
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86d26c57cb
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remove: unnecessary comment from quoted code
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2025-02-01 20:03:36 +09:00 |
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a87e81ad5b
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fix: changed CodeGen sig is not reflected to callers
Note: TokenStream::extend accepts `Result`s, so be careful
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2025-02-01 19:54:34 +09:00 |
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e147bc513d
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refactor: add docs on modules overview to run rustfmt
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2025-02-01 19:41:12 +09:00 |
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d104e62bf3
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new(generator): implement register codegen (codegen_register) & fix interpolation bug
also added a lot of docs,
since register codegen is quite complex
(This became too large commit...)
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2025-02-01 19:33:51 +09:00 |
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eec855c3a1
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update(Register): add type field and its completion to converter
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2025-02-01 19:30:39 +09:00 |
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8e0761e39e
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update(converter): add validation for register about mask & field
ref: ea1850e csr commit
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2025-01-31 12:02:25 +09:00 |
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6b5b5e0234
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new(CodeGen): for Block
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2025-01-31 03:26:42 +09:00 |
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dfd28782dd
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new(generator): top level module
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2025-01-31 02:17:48 +09:00 |
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ac72b3638e
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refactor: removed unnecessary comments
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2025-01-31 01:27:42 +09:00 |
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53c8cbd90f
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new: implement converter (Successfully read current CSR XML)
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2025-01-31 00:36:19 +09:00 |
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51a074d2c0
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add(parser): FieldFifoInterface and custom bool (YES/Y/NO/N) parser
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2025-01-30 19:53:03 +09:00 |
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e7d3e5c90b
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update: remove modf from Field
ref: https://gitlab.cern.ch/l0muon-endcap/endcap-sl-csr-xml/-/merge_requests/3/diffs?commit_id=30a7195653c7cd971e4d59be31befcc75557a64a
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2025-01-30 19:18:02 +09:00 |
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8fee555860
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wip(converter): until Block converter (next: Register)
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2025-01-30 15:33:05 +09:00 |
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a8071b359d
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add: derive(PartialEq) to error types
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2025-01-30 01:19:41 +09:00 |
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